45ps RMS Period jitter (175ps peak-peak) is measured with WaveCrest DTS, 8000 samples, with filtering for samples between 680ns and 730ns.  At lower frequencies (<500Hz), clock phase noise of the hiFace is approximately 10dBc to 15dBc higher than the Audiophilleo1/2.  Integrated phase jitter from 10Hz to 100Khz is not easily measureable since it is not possible to produce fixed clock output with this device.

The hiFace produces voltages of 2.38V peak-peak, far above the maximum of .6V peak-peak allowed by the SPDIF specification.  Overshoot produces a signal of about 5V peak-peak!  The image below shows the captured output of the hiFace into a 75 Ohm terminated BNC connector.